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MCP73853/55
6.1
Application Circuit Design
6.1.1.3
EXTERNAL CAPACITORS
Due to the low efficiency of linear charging, the most
important factors are thermal design and cost. These
are a direct function of the input voltage, output current
and thermal impedance between the battery charger
and the ambient cooling air. The worst-case situation
exists when the device has transitioned from the
Preconditioning mode to the Constant-current mode. In
this situation, the battery charger has to dissipate the
maximum power. A trade-off must be made between
the charge current, cost and thermal requirements of
the charger.
The MCP7385X devices are stable with or without a
battery load. In order to maintain good AC stability in
the Constant-voltage mode, a minimum capacitance of
4.7 μF is recommended to bypass the V BAT pin to V SS .
This capacitance provides compensation when there is
no battery load. In addition, the battery and intercon-
nections appear inductive at high frequencies. These
elements are in the control feedback loop during
Constant-voltage mode. Therefore, the bypass
capacitance may be necessary to compensate for the
inductive nature of the battery pack.
6.1.1
COMPONENT SELECTION
Virtually any good quality output filter capacitor can be
used, independent of the capacitor’s minimum
Selection of the external components in Figure 6-1 is
crucial to the integrity and reliability of the charging
system. The following discussion is intended to be a
guide for the component selection process.
Effective Series Resistance (ESR) value. The actual
value of the capacitor (and its associated ESR)
depends on the output load current. A 4.7 μF ceramic,
tantalum or aluminum electrolytic capacitor at the
6.1.1.1
CURRENT PROGRAMMING RESISTOR
(R PROG )
output is usually sufficient to ensure stability for up to
the maximum output current.
The preferred fast charge current for Lithium-Ion cells
6.1.1.4
REVERSE BLOCKING PROTECTION
is at the 1C rate, with an absolute maximum current at
the 2C rate. For example, a 500 mAH battery pack has
a preferred fast charge current of 500 mA. Charging at
this rate provides the shortest charge cycle times
without degradation to the battery pack performance or
life.
The MCP7385X devices provide protection from a
faulted or shorted input or from a reversed-polarity
input source. Without the protection, a faulted or
shorted input would discharge the battery pack through
the body diode of the internal pass transistor.
400 mA is the typical maximum charge current
6.1.1.5
ENABLE INTERFACE
obtainable from the MCP7385X devices. For this situa-
tion, the PROG input should be connected directly to
V SS .
In the stand-alone configuration, the enable pin is gen-
erally tied to the input voltage. The MCP7385X devices
automatically enter a low power mode when voltage on
6.1.1.2
THERMAL CONSIDERATIONS
the V DD input falls below the UVLO voltage (V STOP ),
reducing the battery drain current to 0.28 μA, typically.
The worst-case power dissipation in the battery char-
ger occurs when the input voltage is at the maximum
6.1.1.6
CHARGE STATUS INTERFACE
and the device has transitioned from the
Preconditioning mode to the Constant-current mode. In
this case, the power dissipation is:
PowerDissipation = ( V DDMAX – V PTHMIN ) × I REGMAX
Two status outputs provide information on the state of
charge. The current-limited, open-drain outputs can be
and Table 5-2 for a summary of the state of the status
output during a charge cycle.
Where V DDMAX is the maximum input voltage
6.2
PCB Layout Issues
(I REGMAX ) is the maximum fast charge current, and
V PTHMIN is the minimum transition threshold voltage.
Power dissipation with a 5V, +/-10% input voltage
source is:
PowerDissipation = ( 5.5 V – 2.7 V ) × 475 mA = 1.33 W
With the battery charger mounted on a 1 in 2 pad of
1 oz. copper, the junction temperature rise is approxi-
mately 50°C. This would allow for a maximum operat-
ing ambient temperature of 35°C before thermal
regulation is entered.
? 2004-2012 Microchip Technology Inc.
For optimum voltage regulation, place the battery pack
as close as possible to the device’s V BAT and V SS pins.
It is recommended that the designer minimize voltage
drops along the high-current-carrying PCB traces.
If the PCB layout is used as a heat sink, adding many
vias in the heat sink pad can help conduct more heat to
the backplane of the PCB, thus reducing the maximum
junction temperature.
DS21915B-page 17
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